1 description ltc 3633aeufd-2 dual channel 3a 20v monolithic synchronous step-down regulator board demonstration circuit dc1958 is a dual output regulator consisting of two constant-frequency step-down convert - ers, based on the ltc3633a-2 monolithic dual-channel synchronous buck regulator. the dc1958 has an input voltage range of 3.6v to 20v, with each regulator capable of delivering up to 3a of output current. the dc1958 can operate in either burst mode ? or forced continuous mode. in shutdown, the dc1958 can run off of less than 15a total. the dc1958 is a very efficient circuit : over 90% for either circuit . the dc1958 uses the 28-pin qfn LTC3633AEUFD-2 package, which has an exposed pad on l , lt, ltc, ltm, burst mode, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. performance summary the bottom side of the ic for better thermal performance . these features, plus a programmable operating frequency range from 500khz to 4mhz (2mhz switching frequency with the r t pin connected to intv cc ), make the dc1958 demo board an ideal circuit for use industrial or distributed power applications. design files for this circuit board are available at http://www .linear.com/demo parameter conditions value minimum input voltages 3.6v maximum input voltages 20v run run pin = gnd shutdown run pin = v in operating output voltage v out1 regulation v in1 = 3.6v to 20v, i out1 = 0a to 3a 1.2v 3% (1.164v to 1.236v) 1.5v 3% (1.455v to 1.545v) 1.8v 3% (1.746v to 1.854v) typical output ripple v out1 v in1 = 12v, i out1 = 3a (20mhz bw) < 30mv p-p output voltage v out2 regulation v in2 = 3.6v to 20v, i out2 = 0a to 3a 2.5v 3% (2.425v to 2.575v) 3.3v 3% (3.201v to 3.399v) 5v 3% (4.85v to 5.15v) typical output ripple v out2 v in2 = 12v, i out2 = 3a (20mhz bw) < 30mv p-p nominal switching frequencies r t pin connected to 324k 1mhz r t pin = intv cc 2mhz burst mode operation channel 1: v in = 12v, v out2 = 1.8v, f sw = 1mhz i out1 ~ 900ma channel 2: v in = 12v, v out2 = 3.3v, f sw = 1mhz i out2 ~ 500ma channel 1: v in = 12v, v out2 = 1.8v, f sw = 2mhz i out1 ~ 730ma channel 2: v in = 12v, v out2 = 3.3v, f sw = 2mhz i out2 ~ 250ma phase phase pin = intv cc out-of-phase phase pin = gnd in-phase intv cc 3.3v 6% specifications are at t a = 25c dc1958f demo manual dc1958
2 quick start procedure demonstration circuit 1958 is easy to set up to evaluate the performance of the ltc3633a-2. for a proper measure - ment equipment configuration, set up the circuit according to the diagram in figure 1. note: when measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. measure the input or output voltage ripple by touching the probe tip directly across the v in or v out and gnd terminals. see the proper scope probe technique in figure 2. please follow the procedure outlined below for proper operation. 1. connect the input power supply to the v in1 / v in2 and gnd terminals (v in1 and v in2 are separate nodes.). connect the loads between the v out and gnd terminals. refer to figure 1 for the proper measurement equipment setup. before proceeding to operation, insert jumper shunts xjp1 and xjp2 into the off positions of headers jp1 and jp2, shunt xjp11 into the on position (180 out-of-phase) of phase header jp11, shunts xjp3 and xjp4 into the soft-start (ss) positions of headers jp3 and jp4, shunt xjp8 into the forced continuous mode (fcm) position of mode header jp8, shunt xjp14 into the 1mhz position of the frequency (freq) header jp14, shunts xjp12 and xjp13 into the external (ext) compensation positions of headers jp12 and jp13, and shunt xjp6 into the v out1 voltage options of choice of header jp6: 1.2v, 1.5v, or 1.8v, and a shunt into the v out2 voltage option of choice: 2.5v ( header jp15), 3.3v ( header jp5), or 5 v ( header jp 7). 2. apply 5.5v at v ins 1 & 2. measure both v outs ; they should read 0v. if desired, one can measure the shut - down supply current at this point. the supply current will be less than 15a in shutdown. 3. turn on v out1 and v out2 by shifting shunts xjp1 and xjp2 from the off positions to the on positions. both output voltages should be within a tolerance of 2%. 4. vary the input voltages from 5.8v (the min. v in is de - pendent on v out ) to 20v, and the load currents from 0a to 3a. both output voltages should be within 3% tolerance. 5. set the load current of both outputs to 3a and the input voltages to 20v, and then measure each output ripple voltage (refer to figure 2 for proper measure - ment technique); they should each measure less than 30 mvac. also, observe the voltage waveform at either switch node (pins 23 & 24 for reg.1 and 13 & 14 for reg.2) of each regulator. the switching frequencies should be between 800khz and 1.2mhz (t = 1.25 s and 0.833s). to realize 2mhz operation, change the shunt position on header jp14. in all cases, both switch node waveforms should be rectangular in shape, and 180out-of-phase with each other. change the shunt position on header jp11 to set the switch waveforms in phase with respect to each other. to operate the ckt.s in burst mode, change the shunt in header jp8 to the burst mode position. when finished, insert shunts xjp1 and xjp2 to the off position(s) and disconnect the power. 6. regulators 1 (v in1 ) and 2 (v in2 ) are completely sepa - rated from each other; thus, they can be powered from different individual input supplies, as can the signal input supply. of course, all the voltage requirements still must be met: 1.5v to 20v for the pv in pins and 3.6v to 20v for the sv in pin. warning : if the power for the demo board is carried in long leads, the input voltage at the part could ring, which could affect the operation of the circuit or even exceed the maximum voltage rating of the ic. to eliminate the ring - ing, a small tantalum capacitor (for instance, avx part # tpsy226m035r0200) is inserted on the pads between the input power and return terminals on the bottom of the demo board. the (greater) esr of the tantalum capacitor will dampen the (possible) ringing voltage caused by the long input leads. on a normal, typical pcb, with short traces, this capacitor is not needed. dc1958f demo manual dc1958
3 quick start procedure ? + ? + ? + + ? + ? + ? ? + v s1 v s2 sv in opt v o1 + ? ? + ? + load 1 + ? v o2 load 2 + ? + ? dc1958a f01 gnd vin figure 1. proper measurement equipment setup figure 2. measuring input or output ripple dc1958f demo manual dc1958
4 quick start procedure figure 3. ltc3633a-2 dc1958 switch operation figure 4. v out1 load step response v in1 & v in2 = 12v, v out1 = 1.8v @ i out1 = 3a, v out2 = 3.3v @ i out2 = 3a forced continuous mode f sw = 1mhz external compensation: r ithx = 13k, c ithx = 220pf trace 1: v sw1 (10v/div) trace 3: v out1 ac voltage (20mv/div ac) trace 2: v sw2 (10v/div) trace 4: v out2 ac voltage (20mv/div ac) v in1 = 12v, v out1 = 1.8v, 3a load step (0a to 3a) forced continuous mode f sw = 1mhz external compensation: r ith1 = 13k, c ith1 = 220pf trace 1: output voltage (100mv/div ac) trace 4: output current (1a/div) dc1958f demo manual dc1958
5 quick start procedure 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 1.00e-03 1.00e-02 1.00e-01 1.00e+00 1.00e+01 ef?ciency (%) load current (a) v out2 = 3 . 3 v , f sw = 1 m h z v out2 = 3.3v, f sw = 2mhz v out1 = 1.8v, f sw = 1mhz v out1 = 1.8v, f sw = 2mhz v in = 12v b u r s t m ode l1 = 1h l2 = 2.2h 2020bz vis hay figure 5. v out2 load step response figure 6. ltc3633a-2 dc1958 efficiency v in2 = 12v, v out2 = 3.3v, 3a load step (0a to 3a) forced continuous mode f sw = 1mhz external compensation: r ith2 = 13k, c ith2 = 220pf trace 1: output voltage (200mv/div ac) trace 4: output current (1a/div) dc1958f demo manual dc1958
6 parts list item qty reference part description manufacturer / part number required circuit components 1 2 c1-c2 cap, 0603, 0.1f, 10%, 50v, x7r tdk c1608x7r1h104k 2 2 cffw 1- cffw2 cap, 0402, 10pf, 5%, 25v, npo avx 04023a100 jat 2a 3 2 c in1 -c in2 cap, 1210, 22f, 20%, 25v, x7r taiyo yuden tmk325b7226mm-tr 4 4 c out1 -c out4 cap, 1206, 22f, 20%, 6.3v, x5r taiyo yuden jmk316bj226ml-t 5 1 csvin cap, 0603, 1f, 10%, 25v, x5r avx 06033d105 kat 2a 6 1 c vcc cap, 0603, 1f, 10%, 16v, x5r avx 0603yd105 kat 2a 7 1 d1 diode, schottky 30v, 100ma central semi cmdsh-3-tr 8 1 l1 ind, 1.0h vishay ihlp-2020bzer1r0m01 9 1 l2 ind, 2.2h vishay ihlp-2020bzer2r2m01 10 2 r3, r5 res, 0402, 29.4k, 1%, 1/16w vishay crcw040229k4fked 11 1 r4 res, 0402 84.5k, 1%, 1/16w vishay crcw040284k5fked 12 1 r6 res, 0402 18.7k, 1%, 1/16w vishay crcw040218k7fked 13 1 u1 ic, dual step-down regulator linear tech, LTC3633AEUFD-2 additional demo board circuit components 1 0 cc1-cc2 cap, 0402, 10pf, 5%, 25v, npo option avx 04023a100 jat 2a option 2 0 c in3 -c in4 cap, 1210, 22f, 20%, 25v, x7r option taiyo yuden tmk325b7226mm-tr 3 2 c in5 -c in6 cap, 6032, 22f, 20%, 35v, tant avx tpsy226m035r0200 4 2 c ith1 -c ith2 cap, 0402, 220pf, 10%, 25v, c0g avx 04023a221 kat 2a 5 2 c out5 -c out6 cap, 0805, 10f, 20%, 6.3v, x5r tdk c2012x5r0j106m 6 0 csvin1 cap, 0603, 1f, 10%, 25v, x5r option avx 06033d105 kat 2a option 7 2 ctr1-ctr2 cap, 0402, 4700pf, 10%, 50v x7r avx 04025c472 kat 8 1 c vcc1 cap, 0603, 1f, 10%, 16v x5r avx 0603yd105 kat 2a 9 1 d2 diode, schottky 30v, 100ma central semi cmdsh-3-tr 10 2 r ith1 -r ith2 res, 0402, 13k, 1%, 1/16w nic nrc04f1302trf 11 2 rpg1-rpg2 res, 0402, 100k, 5%, 1/16w vishay crcw0402100kjned 12 3 r1-r2, rphmde res, 0402, 1m, 5%, 1/16w vishay crcw04021m00jned 13 1 r t res, 0402, 324k, 1%, 1/16w vishay crcw0402324kfked 14 2 rtr 1- rtr 2 res, 0402, 0 jumper vishay crcw04020000z0ed 15 0 rtr 3- rtr 4 res, 0402 option option 16 1 r7 res, 0402, 19.6k, 1%, 1/16w vishay crcw040219k6fked 17 1 r8 res, 0402, 11.5k, 1%, 1/16w vishay crcw040211k5fked 18 1 r9 res, 0402, 14.7k, 1%, 1/16w vishay crcw040214k7fked 19 1 r10 res, 0402 26.7k, 1%, 1/16w vishay crcw040226k7fked 20 1 r11 res, 0402 10k, 5%, 1/16w vishay crcw040210k0jned 21 0 r12 res, 1812 option option hardware: for demo board only 1 16 e1-e16 turret mill-max 2501-2-00-80-00-00-07-0 2 8 jp1-jp4, jp11-jp14 header, 3-pin, 2mm sullins, nrpn031 paen-rc 3 3 jp5, jp7, jp15 header, 2-pin, 2mm sullins, nrpn021 paen-rc 4 2 jp6, jp8 header, 3-pin, dbl row 2mm sullins, nrpn032 paen-rc 5 11 jp1-jp4, jp6-jp8, jp11-jp14 shunt, 2mm samtec 2sn-bk-g dc1958f demo manual dc1958
7 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. schematic diagram 5 5 4 4 3 3 2 2 1 1 d d c c b b a a 3a 3.6v - 20v [1] notes: unless otherwise specified, [1] cin5 and cin6 are inserted on dc1958a to damp en the (possible) ringing voltage due cin5 and cin6 are not needed. ?????? ??????????????????? opt opt opt ??????????????????? ?????? (int.) to the use of long input leads. on a normal, typica l pcb, with short traces, [1] 3.6v - 20v 2. all resistor and capacitor case size are 0402. 1.2v 1.5v 1.8v intvcc vout1 vout2 vin2 svin vin1 svin intvcc intvcc intvcc intvcc intvcc vin1 vin2 svin vin1 vin2 vin1 vin2 ???? ????? ?????? ???? ????? ?? ?????? ????????? ???????? ???????? technology ?????????????????? ?????????????????? ???????????????????? ??????????????????? ?????????????????????????????????????? ??????????????? ???????????????????????????????????????????????????? ???????????????????????????????????????????????????? ???????????????????????????????????????????????????? ?????????????????????????????????????????????????? ???????????????????????????????????????????????? ????????????????????????????????????????????????????? ??????????????????????????????????????????? ??????????????????????????????????????????????????? ???????????????????????????????????????????????????? ????????? ?????????????????????????????????????????????? ???????????? ?????????????? 2 10/17/12 10:36:59 11 dual synchronous step-down ?? ?????? n/a LTC3633AEUFD-2 demo circuit 1958a regulator ???? ????? ?????? ???? ????? ?? ?????? ????????? ???????? ???????? technology ?????????????????? ?????????????????? ???????????????????? ??????????????????? ?????????????????????????????????????? ??????????????? ???????????????????????????????????????????????????? ???????????????????????????????????????????????????? ???????????????????????????????????????????????????? ?????????????????????????????????????????????????? ???????????????????????????????????????????????? ????????????????????????????????????????????????????? ??????????????????????????????????????????? ??????????????????????????????????????????????????? ???????????????????????????????????????????????????? ????????? ?????????????????????????????????????????????? ???????????? ?????????????? 2 10/17/12 10:36:59 11 dual synchronous step-down ?? ?????? n/a LTC3633AEUFD-2 demo circuit 1958a regulator ???? ????? ?????? ???? ????? ?? ?????? ????????? ???????? ???????? technology ?????????????????? ?????????????????? ???????????????????? ??????????????????? ?????????????????????????????????????? ??????????????? ???????????????????????????????????????????????????? ???????????????????????????????????????????????????? ???????????????????????????????????????????????????? ?????????????????????????????????????????????????? ???????????????????????????????????????????????? ????????????????????????????????????????????????????? ??????????????????????????????????????????? ??????????????????????????????????????????????????? ???????????????????????????????????????????????????? ????????? ?????????????????????????????????????????????? ???????????? ?????????????? 2 10/17/12 10:36:59 11 dual synchronous step-down ?? ?????? n/a LTC3633AEUFD-2 demo circuit 1958a regulator revision history description date approved eco rev tom g. proto 1 02/13/12 2 ic pin out difference 09/13/12 tom g. revision history description date approved eco rev tom g. proto 1 02/13/12 2 ic pin out difference 09/13/12 tom g. revision history description date approved eco rev tom g. proto 1 02/13/12 2 ic pin out difference 09/13/12 tom g. c2 0.1uf c2 0.1uf cith1 220pf cith1 220pf r1 1m r1 1m jp13 ith2 ext int jp13 ith2 ext int 1 3 2 cvcc 1uf cvcc 1uf e15 gnd e15 gnd jp6 vo1 select jp6 vo1 select 1 2 3 4 5 6 r6 18.7k 1% r6 18.7k 1% rtr4 opt rtr4 opt r2 1m r2 1m cin2 22uf 25v 1210 cin2 22uf 25v 1210 cin1 22uf 25v 1210 cin1 22uf 25v 1210 jp4 track/ss2 ss track jp4 track/ss2 ss track 1 3 2 csvin1 1uf csvin1 1uf csvin 1uf csvin 1uf rt 324k 1% rt 324k 1% rith1 13k 1% rith1 13k 1% l2 2.2uh l2 2.2uh e2 vin1 e2 vin1 cin3 22uf 25v 1210 cin3 22uf 25v 1210 u1 LTC3633AEUFD-2 u1 LTC3633AEUFD-2 von1 25 boost1 19 intvcc 18 boost2 17 sgnd 7 von2 12 vfb2 9 track/ss2 10 ith2 11 pgood2 8 sw2 14 sw2 13 vin2 15 vin2 16 run2 6 rt 5 mode/sync 4 run1 3 pvin1 21 pvin1 22 sw1 23 sw1 24 pgood1 1 track/ss1 27 vfb1 28 pgnd 29 ith1 26 phmode 2 svin 20 rpg1 100k rpg1 100k 22uf cout3 6.3v 1206 22uf cout3 6.3v 1206 rphmde 1m rphmde 1m e13 svin e13 svin e1 pgood1 e1 pgood1 + cin6 22uf 35v 7343 + cin6 22uf 35v 7343 rtr1 0 rtr1 0 jp1 on off run1 jp1 on off run1 1 3 2 ctr2 4700pf ctr2 4700pf 22uf cout1 6.3v 1206 22uf cout1 6.3v 1206 e4 vout1 3a e4 vout1 3a + cin5 22uf 35v 7343 + cin5 22uf 35v 7343 e3 gnd e3 gnd 22uf cout2 6.3v 1206 22uf cout2 6.3v 1206 r5 29.4k 1% r5 29.4k 1% ctr1 4700pf ctr1 4700pf jp11 on off phase jp11 on off phase 1 3 2 r8 11.5k 1% r8 11.5k 1% c1 0.1uf c1 0.1uf e5 vout2 e5 vout2 jp5 3.3v jp5 3.3v e6 gnd e6 gnd cffw2 10pf cffw2 10pf r9 14.7k 1% r9 14.7k 1% 22uf cout4 6.3v 1206 22uf cout4 6.3v 1206 e12 sync e12 sync rtr3 opt rtr3 opt e9 track1 e9 track1 r12 opt r12 opt e10 intvcc e10 intvcc cvcc1 1uf cvcc1 1uf rpg2 100k rpg2 100k cc1 10pf opt cc1 10pf opt r3 29.4k 1% r3 29.4k 1% cith2 220pf cith2 220pf e7 gnd e7 gnd r4 84.5k 1% r4 84.5k 1% cc2 10pf opt cc2 10pf opt 10uf cout6 6.3v 0805 10uf cout6 6.3v 0805 jp7 5v jp7 5v e14 gnd e14 gnd jp8 mode fcm (forced continuous mode) burst mode sync jp8 mode fcm (forced continuous mode) burst mode sync 1 2 3 4 5 6 rtr2 0 rtr2 0 jp14 1mhz 2mhz freq jp14 1mhz 2mhz freq 1 3 2 e16 vin2 e16 vin2 e8 pgood2 e8 pgood2 10uf cout5 6.3v 0805 10uf cout5 6.3v 0805 e11 track2 e11 track2 jp15 2.5v vo2 select jp15 2.5v vo2 select cffw1 10pf cffw1 10pf r11 10k r11 10k rith2 13k 1% rith2 13k 1% r10 26.7k 1% r10 26.7k 1% jp2 run2 on off jp2 run2 on off 1 3 2 jp3 ss track track/ss1 jp3 ss track track/ss1 1 3 2 cin4 22uf 25v 1210 cin4 22uf 25v 1210 jp12 ext int ith1 jp12 ext int ith1 1 3 2 d1 cmdsh-3-tr d1 cmdsh-3-tr r7 19.6k 1% r7 19.6k 1% d2 cmdsh-3-tr d2 cmdsh-3-tr l1 1.0uh l1 1.0uh dc1958f demo manual dc1958
8 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2013 lt 0313 ? printed in usa demonstration board important notice linear technology corporation ( lt c ) provides the enclosed product(s) under the following as is conditions: this demonstration board (demo board) kit being sold or provided by linear technology is intended for use for engineering development or evaluation purposes only and is not provided by lt c for commercial use. as such, the demo board herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. as a prototype, this product does not fall within the scope of the european union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. if this evaluation kit does not meet the specifications recited in the demo board manual the kit may be returned within 30 days from the date of delivery for a full refund. the foregoing warranty is the exclusive warranty made by the seller to buyer and is in lieu of all other warranties , expressed, implied, or statutory , including any warranty of merchantability or fitness for any particular purpose. except to the extent of this indemnity , neither party shall be liable to the other for any indirect , special, incidental, or consequential damages. the user assumes all responsibility and liability for proper and safe handling of the goods. further , the user releases lt c from all claims arising from the handling or use of the goods. due to the open construction of the product, it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. also be aware that the products herein may not be regulatory compliant or agency certified (fcc, ul, ce, etc.). no license is granted under any patent right or other intellectual property whatsoever . lt c assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. lt c currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. please read the demo board manual prior to handling the product. persons handling this product must have electronics training and observe good laboratory practice standards. common sense is encouraged. this notice contains important safety information about temperatures and voltages. for further safety concerns, please contact a lt c applica- tion engineer . mailing address: linear technology 1630 mccarthy blvd. milpitas, ca 95035 copyright ? 2004, linear technology corporation dc1958f demo manual dc1958
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